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DeMon48_128k

Intel 8049 (8048, 8748, 8749, 8035, 8039) / MCS-48 Hardware-Debugger & Monitor

Documentation - Chapter 7


7.0.0 Appendix

7.1.0 Instruction set of 8035,8039,8048,8049,8748,8749,8040,8050 µCs

MnemonicCyclesBytesFlags
ADD A,Rr11C
ADD A,@Ri11C
ADD A,#data22C
ADDC A,Rr11C
ADDC A,@Ri11C
ADDC A,#data22C
ANL A,Rr11-
ANL A,@Ri11-
ANL A,#data22-
ANL BUS,#data22-
ANL Pp,#data22-
ANLD Pp,A21-
CALL address22SP
CLR A11-
CLR C11C
CLR F011F0
CLR F111F1
CPL A11-
CPL C11C
CPL F011F0
CPL F111F1
DA A11AC, C
DEC A11-
DEC Rr11-
DIS I11-
DIS TCNTI11-
DJNZ Rr,address22-
EN I11-
EN TCNTI11-
ENT0 CLK11-
IN A,Pp21-
INC A11-
INC Rr11-
INC @Ri11-
INS A,BUS (*)21-
JBb address22-
JC address22-
JF0 address22-
JF1 address22-
JMP address22-
JMPP @A21-
JNC address22-
JNI address22-
JNT0 address22-
JNT1 address22-
JNZ address22-
JTF address22-
JT0 address22-
MnemonicCyclesBytesFlags
JT1 address22-
JZ address22-
MOV A,#data22-
MOV A,PSW11-
MOV A,Rr11-
MOV A,@Ri11-
MOV A,T11-
MOV PSW,A11-
MOV Rr,A11-
MOV Rr,#data22-
MOV @Ri,A11-
MOV @Ri,#data22-
MOV T,A11-
MOVD A,Pp21-
MOVD Pp,A21-
MOVP A,@A21-
MOVP3 A,@A21-
MOVX A,@Ri21-
MOVX @Ri,A21-
NOP11-
ORL A,Rr11-
ORL A,@Ri11-
ORL A,#data22-
ORL BUS,#data22-
ORL Pp,#data22-
ORLD Pp,A21-
OUTL BUS,A (*)21-
OUTL Pp,A21-
RET21SP
RETR21SP, PSW
RL A11-
RLC A11C
RR A11-
RRC A11C
SEL MB011-
SEL MB111-
SEL RB011BS
SEL RB111BS
STOP TCNT11-
STRT CNT11-
STRT T11-
SWAP A11-
XCH A,Rr11-
XCH A,@Ri11-
XCHD A,@Ri11-
XRL A,Rr11-
XRL A,@Ri11-
XRL A,#data22-
(*) Must not be used with an external program memory.

SymbolDefinition
ACAuxiliary Carry Flag in PSW
BSBank-Select Flag in PSW
CCarry Flag in PSW
F0User Flag 0 in PSW
F1User Flag 1
PpPort (p = 1, 2 or p = 4...7)
PSWProgram Status Word
RiIndex Register (i = 0, 1)
RrWork Register (r = 0...7)
SPStack-Pointer in PSW

7.2.0 DeMon48_128k code example "RAM Test"

"RAM Test" for MCS-48 µCs uses the MMU to write to the entire DeMon48_128k RAM, reading back the stored value and comparing it with the previously written value:

  1. Test memory area 0x1FFFF...0x10000
  2. Test memory area 0x0FFFF...0x00100
  3. Copy program from page 0 (start address 0x00000) to page 1 (start address 0x00100)
  4. Test memory area 0x000FF...0x00000
  5. Copy program from page 1 (start address 0x00100) to page 0 (start address 0x00000)

If there is a difference between the written and read value, the error-counter output on P1 is incremented. If T0 is set to logic high, the test loop then stops until it is resumed by a high-to-low transition at *INT.

If T1 is set to logic low, an I/O area enabled by the jumper configuration (see "5.0.0 Memory configurations") is disabled via the MMU's expansion register (EXP) before a new test run is started.

    ;DeMon48_128k RAM Test V1.0.0
    ;
    ;Tests its entire 128kB RAM and displays the number of verify errors on P1
    ;
    ;T0 : Stop on verify error (1) / Don't stop on verify error (0)
    ;T1 : Enable (1) / Disable (0) I/O address range
    ;*INT : Continue after stop (H->L)
    ;
    ;2024 M. Schmoll * www.controller-designs.de
    ;
    CPU 8039
    ORG 000H
    CLR A
    OUTL P1,A                 ;Reset verify errors
RAMTEST128K:
    CLR A
    JT1 RAMTEST_EXP_WRITE     ;Enable I/O, if T1 = 1
    MOV A,#00001000B          ;Disable I/O, if T1 = 0
RAMTEST_EXP_WRITE:
    MOVD P7,A                 ;EXP = A, DA16 = H
U64K_TEST:
    ;Test 0x1FFFF...0x10000
    MOV R6,#10H
U64K_LOOP2:
    MOV A,R6
    DEC A
    MOVD P5,A                 ;DBH = A, DA16 = H
    MOV R7,#10H
U64K_LOOP1:
    MOV A,R7
    DEC A
    MOVD P4,A                 ;DBL = A, DA16 = H
    CALL TEST256BYT
    DJNZ R7,U64K_LOOP1
    DJNZ R6,U64K_LOOP2
L64K_TEST:
    ;Test 0x0FFFF...0x00100
    MOV R6,#10H
L64K_LOOP2:
    MOV A,R6
    DEC A
    ORLD P5,A                 ;DBH = A, DA16 = L
    MOV R7,#10H
L64K_LOOP1:
    MOV A,R7
    DEC A
    ORLD P4,A                 ;DBL = A, DA16 = L
    CALL TEST256BYT
    MOV A,#02H
    XRL A,R7                  ;DBL = 0x1 ?
    JNZ L64K_CONT
    MOV A,#01H
    XRL A,R6                  ;DBH = 0x0 ?
    JZ L64K_EXIT              ;Yes, exit before writing to page 0
L64K_CONT:
    DJNZ R7,L64K_LOOP1
    DJNZ R6,L64K_LOOP2
L64K_EXIT:
    ;Prepare for 256Byte copy from page 0 to page 1
    MOV R7,#01                ;Destination page
    MOV R6,#00                ;Source page
    CALL COPY256BYT
    CPL F0                    ;Execute code on page 1
    JMP TEST_P0 + 0100H       ;Jump to page 1
TEST_P0:
    ;Test 0x000FF...0x00000
    CLR A
    ORLD P5,A                 ;DBH = A, DA16 = L
    ORLD P4,A                 ;DBL = A, DA16 = L
    CALL TEST256BYT + 0100    ;Call to page 1
    ;Prepare for 256Byte copy from page 1 to page 0
    MOV R7,#00                ;Destination page
    MOV R6,#01                ;Source page
    CALL COPY256BYT + 0100    ;Call to page 1
    CLR F0                    ;Execute code on page 0
    JMP RAMTEST128K           ;Jump to page 0
    ;-----------------------------------------------------------------
TEST256BYT:
    ;Test a 256Byte page selected by DBH and DBL
    ;Destroys : A,R0,R5,P1
    MOV R0,#00
TEST256BYT_L0:
    MOV A,R0
    CPL A
    MOVX @R0,A                ;Write
    MOVX A,@R0                ;Read
    CPL A
    XRL A,R0                  ;Verify
    JZ TEST256BYT_L6          ;Verify ok
    IN A,P1                   ;Display number of verify errors on P1
    INC A
    OUTL P1,A
    JNT0 TEST256BYT_L5        ;Don't stop on error, if T0 = 0
TEST256BYT_L1:
    ;Wait for *INT=H
    JNI TEST256BYT_L1
    MOV R5,#00H               ;Debounce
    NOP
    NOP
    NOP
    DJNZ R5,$-3
TEST256BYT_L2:
    ;Wait for *INT=L
    JNI TEST256BYT_L5
TEST256BYT_L3:
    JF0 TEST256BYT_L4         ;F0 is set, if code is on page 1
    JMP TEST256BYT_L2         ;Jump to page 0
TEST256BYT_L4:
    JMP TEST256BYT_L2 + 0100H ;Jump to page 1
TEST256BYT_L5:
    MOV R5,#00H               ;Delay after verify error
    NOP
    NOP
    NOP
    DJNZ R5,$-3
TEST256BYT_L6:
    DJNZ R0,TEST256BYT_L0
    RET
    ;-----------------------------------------------------------------
COPY256BYT:
    ;Copy a 256Byte page in 4kB-Bank 0
    ;R7 = Destination page
    ;R6 = Source page
    ;Destroys : A,R0,R5,DBL,DBH,DA16
    CLR A
    ORLD P5,A                 ;DBH = A, DA16 = L
    MOV R0,A                  ;Init loop counter
COPY256BYT_L:
    MOV A,R6                  ;Source page
    ORLD P4,A                 ;DBL = A, DA16 = L
    MOV A,R0
    MOVX A,@R0
    MOV R5,A
    MOV A,R7                  ;Destination page
    ORLD P4,A                 ;DBL = A, DA16 = L
    MOV A,R5
    MOVX @R0,A
    DJNZ R0,COPY256BYT_L
    RET


DeMon48_128k_Breadboard2