Click on a link in the table or the corresponding preview image to get the graphics in full resolution.
(Or use the download version (PDF) from the project page.)
| Sheet | Description / Link |
| 01 | Debug-Controller |
| 02 | Debug Interface, SRAM, Flash-Memory |
| 03 | MCS-48 µC, Buffers, Single-Step |
| 04 | MMU1 (DMUX, DBR, PBR, EXP) |
| 05 | MMU1 PBR Timing |
| 06 | MMU2 (RAM/ROM select, I/O) |
| 07 | MMU2 Functions And Timing |
| 08 | Hardware-Breakpoint, Ext. Control Bus |
| 09 | Dual Addressbus-Monitor (Hex/Oct/Dec) 1 |
| 10 | Dual Addressbus-Monitor (Hex/Oct/Dec) 2 |
| 11 | Frontpanel Display 1 |
| 12 | Frontpanel Display 2 |
| 13 | Frontpanel Display 3, AutoLoad / -Start |
| 14 | Oscillator and Glitchless Clock Switch |
| 15 | External Interfaces (Examples) |
| 16 | ROM Configurations (Examples) |
| 17 | MCS-48 Timing 1 |
| 18 | MCS-48 Timing 2 |
| 19 | MCS-48 Logic Analyzer Traces 1 |
| 20 | MCS-48 Logic Analyzer Traces 2 |
| 21 | MCS-48 Logic Analyzer Traces 3 |
| 22 | Breadboard 1 |
| 23 | Breadboard 2 |
| 24 | Breadboard 3 |
| 25 | Breadboard 4 |
| 26 | Frontpanel Layout |
| -- | DeMon48_128k GUI Screenshot |
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GUI
DeMon48_128k_Documentation - Online version - ©2023...2026 Marco Schmoll *
www.controller-designs.de * All Rights Reserved !
DeMon48_128k * Intel 8049 / MCS-48 Hardware-Debugger & Monitor - ©2021...2026 Marco Schmoll *
www.controller-designs.de * All Rights Reserved !